Note: This is taken from the Chicken Wiki, where a more recent version could be available.
A control structure that provides basic makefile operations in Scheme.
This library provides a Scheme version of the standard unix make utility. Its syntax is intended to simulate regular unix make in Scheme.
The idea is to explain how to generate some project you have from a collection of source files that go through several stages of processing.
For example, let's say that you are writing soem project that has three input files (that you create and maintain) called a.input, b.input, and c.input. Further, there are two stages of processing – first you run a particular tool make-output that takes an input file and produces and output file, and second you combine the input files into a single file using output. Using make, you might write this:
a.output: a.input make-output a.input a.output b.output: b.input make-output b.input b.output c.output: c.input make-output c.input c.output total: a.output b.output c.output combine a.output b.output c.output
Once you've put those above lines in a file called Makefile, you can issue the command:
that builds your entire project. The Makefile consists of several lines that tell `make' how to create each piece. The first two lines say that a.output depends on a.input and the command for making a.output from a.input is
make-output a.input a.ouput
The point of this exercise is that the make utility looks at the file creation dates of the various files and only re-builds what is necessary. Make is based on building things with shell programs. If, on the other hand, you want to build similar things with various Scheme programs, you can use the make collection.
Here's the equivalent Scheme program:
(require-for-syntax 'make) (define (make-output in out) ...) (define (combine-total . args) ...) (make (("a.output" ("a.input") (make-output "a.output" "a.input")) ("b.output" ("b.input") (make-output "b.output" "b.input")) ("c.output" ("c.input") (make-output "c.output" "c.input")) ("total" ("a.output" "b.output" "c.output") (combine-total "a.output" "b.output" "c.output")) ) "total")
If you were to fill in the ellipses above with calls to system, you'd have the exact same thing as the original Makefile. In addition, if you use make/proc, you can abstract over the various make lines (for example, the a.output, b.output, and c.output lines are very similar and it would be good to write a program to generate those lines). <macro>(make ((TARGET (DEPEND ...) COMMAND ...) ...) ARGV)</macro>
(make/proc (list (list TARGET (list DEPEND ...) (lambda () COMMAND ...)) ...) ARGV)
<procedure>(make/proc SPEC ARGV)</procedure>
Performs a make according to SPEC and using ARGV selecting one or more targets. ARGV can either be a string or a vector or list of strings.
SPEC is a MAKE-SPEC:
MAKE-SPEC = (list-of MAKE-LINE) MAKE-LINE = (list TARGET (list-of DEPEND-STRING) COMMAND-THUNK) TARGET = (union string (list-of string)) ; either a string or a list of strings DEPEND-STRING = string COMMAND-THUNK = (-> void)
To make a target, MAKE/PROC is first called on each of the target's dependencies. If a target is not in the spec and it exists, then the target is considered made. If a target is older than any of its dependencies, the corresponding COMMAND-THUNK is invoked. The COMMAND-THUNK is optional; a MAKE-LINE without a COMMAND-THUNK is useful as a target for making a number of other targets (the dependencies).
If #f, make only prints when it is making a target. Otherwise, it prints when it is checking the dependancies of a target. Defaultly #t.
If #f, make only prints "checking..." lines for dependancies that have a corresponding make line. Defaultly #f.
If #t, make prints the reason for each dependancy that fires. Defaultly #t.
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